THERMAL: SBIR

OUSD (R&E) critical technology area(s): Advanced Materials, Directed Energy (DE), Hypersonics, Microelectronics, Renewable Energy Generation and Storage

Objective: To develop a manufacturable mixed-signal integrated circuit (IC) technology capable of reliable operation in harsh environments, specifically high-temperature conditions up to 800°C.

Description: The Defense Advanced Research Projects Agency (DARPA) is soliciting innovative proposals for the research and development of mixed-signal IC technology.

Semiconductor electronics face significant challenges in extreme thermal environments, where conventional silicon-based technologies degrade beyond 250°C, limiting their use in defense, aerospace, and energy applications. As demand grows for long-duration reliability, wide-bandgap materials like silicon carbide (SiC) and gallium nitride (GaN) offer promising alternatives due to their thermal resilience and electrical performance, yet current high-temperature electronics still lack the speed, stability, and manufacturability needed for widespread deployment.

To address this, the Department of War (DoW) has launched targeted innovations to enhance high-temperature semiconductor capabilities. Missile guidance and propulsion systems require precision sensing and signal processing despite exposure to extreme heat, ensuring reliable performance in defense applications. Likewise, geothermal and nuclear monitoring depend on real-time sensing in sustained high-temperature environments to maintain system integrity. Space missions, such as Venus landers, demand electronics capable of withstanding surface temperatures approaching 500°C for long-duration survivability.

While SiC-based electronics demonstrate operability beyond 800°C, their limited switching speed constrains high-performance applications requiring fast signal processing and complex computing. Conversely, GaN-based semiconductors offer superior speed but lack validated long-term stability at extreme temperatures. DARPA’s High Operational Temperature Sensors (HOTS) program has paved the way for high-speed integrated circuits optimized for ultra-high temperatures, providing crucial insights into material engineering, thermal management, and circuit design.

This Small Business Innovation Research (SBIR) opportunity seeks to build on these advancements by developing a scalable wafer-based fabrication process for high-speed mixed-signal ICs, optimized for extreme temperatures. The initiative aims to establish a manufacturable microelectronics platform, enabling DoW stakeholders to design and deploy high-temperature semiconductor technologies across defense, aerospace, and energy sectors. By advancing material engineering, thermal mitigation strategies, and circuit architectures, this effort will overcome current limitations, delivering high-speed, thermally resilient electronics capable of sustained operation at 800°C.

Phase I

Phase I is a 6-month effort to demonstrate the feasibility of the mixed-signal IC design and fabrication process through modeling and simulation, with experimental validation preferred. This includes an amplifier, exemplifying analog IC performance, with a measured Direct Current (DC) gain exceeding 20 dB and a unity gain bandwidth greater than 1 MHz, verified at 800°C; and a ring oscillator, representing digital IC functionality, with a propagation delay of less than 500 ns, measured at 800°C. Deliverables for Phase I include initial and interim technical reports; quarterly financial reports; and a draft and final technical report including a proof-of-concept analysis and simulation, a preliminary mixed-signal IC design, a fabrication process, risk assessment and mitigation strategy, and commercialization plan. There will also be a kickoff meeting, quarterly meetings, and a closeout meeting.

Phase I fixed payable milestones for this program should include:

• Month 1: Initial Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns. Phase I Kickoff Meeting.
• Month 3: Interim Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 5: Draft Final Technical Report addressing all the characteristics listed in the Phase I description section and any other factors identified as relevant by the performer. The Draft Final Technical Report should additionally include proof-of-concept analysis and simulation, a preliminary mixed-signal IC design, a fabrication process, risk assessment and mitigation strategy, and commercialization plan on applicability to defense and commercial markets.
• Month 6: Final Technical Report addressing all the characteristics listed in the Phase I description section and any other factors identified as relevant by the performer. The Draft Final Technical Report should additionally include proof-of-concept analysis and simulation, a preliminary mixed-signal IC design, a fabrication process, risk assessment and mitigation strategy, and commercialization plan on applicability to defense and commercial markets. Presentation of results at a Phase I closeout meeting.

Phase II

Phase II is anticipated to be up to 36-months to demonstrate an Analog-to-Digital Converter (ADC) capable of stable operation at 800°C with a sampling rate exceeding 10,000 samples per second, 8-bit resolution, power consumption below 1 W, and an input voltage range of 0–5 V or wider to support various sensor interfaces. The ADC must maintain a signal-to-noise ratio (SNR) exceeding 40 dB, ensuring reliable signal integrity in extreme environments. Building on this circuit foundation, the performer must drive the maturation of the wafer fabrication process, completing at least one lot every six months with a minimum 4-inch diameter to support scalability. Each cycle will undergo rigorous electrical characterization, including unit device testing, reference IC validation, and yield analysis to assess reliability and manufacturability. Deliverables for Phase II include quarterly technical and financial reports; a demonstration; and a draft and final technical report including an updated commercialization plan. There will also be a kickoff meeting, quarterly meetings, and a closeout meeting.

Phase II fixed payable milestones for this program should include:

• Month 1: Technical Report providing an assessment of project goals, progress, status, as well as issues and concerns. Phase II Kickoff Meeting.
• Month 4: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 7: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 10: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 13: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 16: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 19: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 22: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 25: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 28: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 31: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns.
• Month 34: Technical Report providing an assessment of project goals, progress, status, as well as any issues and concerns. Demonstration of ADC to Government team.
• Month 35: Draft Final Technical Report listing the measured performance of the ADC and wafer fabrication process against the characteristics listed in the Phase II description section and an updated commercialization plan.
• Month 36: Final Technical Report listing the measured performance of the ADC and wafer fabrication process against the characteristics listed in the Phase II description section and an updated commercialization plan. Presentation of results at a Phase II closeout meeting.

Phase III dual use applications

Phase III refers to work that derives from, extends, or completes an effort made under prior SBIR funding agreements, but is funded by sources other than the SBIR program. The small business should focus on commercializing the product for sale in military or private sector markets such as aerospace or energy. Critical dual use applications include sensor electronics in extreme environments.

This phase will assess and improve the operating lifetime of the mixed-signal IC across 500 to 800°C, ensuring reliability for defense and commercial applications. Long-term failure mechanisms will be analyzed to enhance durability and performance. To support commercialization and technology transition, a Process-Design Kit (PDK) will be finalized for standardized fabrication, while a scalability and deployment strategy will be developed to facilitate DOW integration and broaden adoption in commercial markets. This approach optimizes manufacturing scalability, cost efficiency, and long-term sustainability.

References

1. High Operational temperature Sensors (HOTS) Broad Agency Announcement (BAA)

Keywords

Mixed-signal integrated circuits, semiconductor electronics, extreme temperature electronics, thermally hardened electronics, sensors, microelectronics manufacturing

TPOC-1-PoC

DARPA BAA Help Desk

Email

SBIR_BAA@darpa.mil