Low Resource Computing: SBIR

OUSD (R&E) critical technology area(s): Microelectronics

Objective: This effort will develop commercially viable re-use of existing DoW assets in lieu of new hardware investments. It will demonstrate achieving mission-capable performance, security, and stability into legacy “low-resource” assets (low-resource: end-of-lifed and/or < 25% of proposed new-system resources – in one-of RAM, CPU, disk). The end product will establish approaches about material reuse regarding the oft-quoted “[y]ou go to war with the army you have, not the army you might want or wish to have at a later time” (Donald Rumsfeld).

Description: The warfighter and their sustainment enterprise face the challenge of widely-fielded, well-understood, and battle-tested hardware being pervasive, but the rapidly evolving landscape of processing, sensor fusion, algorithms, and more do not keep pace with those. For example, often the Department looks to long-term program-of-record modernization programs which look at near-“greenfield” approaches – such as creating a new flight computer system for a plane, before being able to load it with updated software. In these cases, “greenfield” development approaches, incentives to sell new hardware, and difficulty of understanding legacy systems (e.g., vendor attrition, USG not retaining technical data packages) leads to “we have to upgrade it before we can have this new feature”. Likewise, new hardware can typically only be added at multi-year baseline intervals.

The challenge is to determine alternate paths. Developments in meta-programming borrowed from the security community allow new functions to be added to existing systems using their existing code through ‘semantic overlays’. This seeks innovative solutions that repurpose existing hardware to add net-new features not thought possible today due to resource limitations (lack-of-upgradeability, RAM, CPU, disk, etc).

This approach shifts focus from procuring powerful hardware to creatively applying all available computational resources, no matter how minimal.

This is critically not creating new chips, new computing architectures, etc. Instead, this effort seeks to repurpose existing chips and architectures in novel ways to fill capability gap.

Phase I

Phase I seeks a basic prototype that brings cutting-edge capabilities to a low-resource system that is widely believed to not be capable of achieving it. Some examples include:

• Don’t build a new radio, instead enable an old radio to detect a modern drone signature.
• Don’t build a standalone edge device or transport, instead integrate with COTS equipment and build low-SWaP solutions from COTS chipsets.
• Don’t install a new, wired Vehicle Health Monitoring System (VHMS), instead provide a peel-and-stick wireless sensor package that predicts component failures.
• Don’t replace a warship’s sonar array, instead reprogram its acoustic processor to differentiate between marine life and enemy Unmanned Underwater Vehicles (UUVs).

A successful concept will define the proposed concept and present an analysis of why the low-resource system upgraded is either end-of-life and/or contains under 25% of proposed new-system resources (in at least one-of RAM, CPU, disk or the equivalent in other device architectures e.g. FPGAs, DSPs).

A successful Phase I will demonstrate that the cutting-edge capability could be fielded by re-using existing hardware that is environmentally tested, platform certified, airworthy, etc. can quickly make a capability available years ahead of expected schedules. Phase I feasibility will be determined based on analysis of the low-resource system, combined with the prototype successfully demonstrating that the existing hardware capability can run capabilities that is otherwise believed to (1) not be feasible on that hardware or (2) ability to deliver on the hardware would take over 2 years of effort. The case for (1) or (2) must be clearly explained and argued based on available data, and the Government will evaluate the realism of the case made. Phase I proposers are encouraged to use existing low-resource devices for demonstrating their prototypes, if they can be properly obtained. A proposer can, if needed, instead propose a surrogate device. Devices used should not be produced by the proposer, as the intent is to show ability to extend a device fielded that the vendor does not have inherent control/design data on.

Phase I fixed payable milestones for this program should include:

• Month 1: Report on initial architectures, selected platform, and new functionality specifications
• Month 3: Report on completion of acquisition of selected platform, proposed evaluation metrics and initial analyses results
• Month 4: Interim report describing performance of prototype system
• Month 5: Demonstration of prototype system with initial performance metrics documented
• Month 6: Final Phase I Report summarizing approach; prototype architectures and algorithms; results of performance metrics and evaluation design; comparison with alternative state-of-the-art modernization options

Phase II

This topic is soliciting both Phase I and Direct to Phase II (DP2) proposals. Direct to Phase II (DP2) feasibility will be determined based on analysis of a proposer-selected low-resource system (see Phase I section above for limitations and definitions), combined with a prototype successfully demonstrating that the existing hardware capability can run capabilities that is otherwise believed to (1) not be feasible on that hardware or (2) ability to deliver on the hardware would take over 2 years of effort. The case for (1) or (2) must be clearly explained and argued based on available data, and the Government will evaluate the realism of the case made.

In Phase II, the art of computational upcycling must be fully proven to mature this to be ready for a DoD acquisition program, other agency, or commercialization to use. Phase II must demonstrate the approach across 3 or more low-resource systems and show successful meaningful feature addition.

A Phase II option may be exercised at DARPA’s discretion to further mature the technology for actual use in a program, subject to successful demonstration of the Phase II base goals.

Phase II fixed payable milestones for the base program should include:

• Month 1: Report on planned architecture, the three (3) selected platforms, and new functionality specifications
• Month 3: Report on completion of acquisition of selected platform, detailed mapping of functionality specifications to targeted baseline for at least one (1) platform
• Month 6: Demonstration of performance of a single prototype system with performance metrics documented and compared to targeted baseline
• Month 9: Demonstration of at least two (2) prototype systems with performance metrics documented and compared to targeted baseline
• Month 12: Final Phase II Report summarizing approach; prototype architectures and algorithms; results of performance metrics and evaluation design; comparison with alternative state-of-the-art modernization options

Phase II fixed payable milestones for the option should include:

• Month 1: Report on research and data analysis based on any Government Furnished Information (GFI) related to program targeted for transition. Report should cover summaries of challenges, existing program timelines, and low-resource hardware that serves as the ‘gating’ factor
• Month 3: Report on plan for resource optimization and computational trade-offs planned. Report should make concise arguments backed by calculations of why this approach is feasible to achieve objectives within the pre-existing LRC environment
• Month 6: Report on completion of setup of surrogate system and/or integration with program-provided hardware-in-the-loop (HWIL) test-bed as applicable
• Month 9: Demonstration of a prototype system with performance metrics documented and compared to targeted baseline
• Month 12: Final Phase II Option Report summarizing approach; prototype architectures and algorithms; results of performance metrics and evaluation design; comparison with alternative state-of-the-art modernization options. Updated prototype demonstration meeting performance metrics

Phase III dual use applications

Commercial applications that this SBIR is relevant to include remanufacturing of legacy hardware, including in the field (“out-of-factory”) to upcycle them into a new life. Further, products and services coming from this work may be directly applicable to the Federal Government, where a wide range of systems from legacy civilian infrastructure to military weapons systems can benefit from the techniques proven under this SBIR.

References

1. “Guidance for Acquisition Program Baselines for Major Capability Acquisition.” July 2025.
2. “10 USC 4214: Baseline description”

Keywords

remanufacturing, microprogramming. Microcircuits, engineering, green-field, de-manufacturing

TPOC-1-PoC

DARPA BAA Help Desk

Email

SBIR_BAA@darpa.mil