The low cost of digital imaging devices has allowed them to become ubiquitous consumer products. This low cost is made possible by leveraging a mature complementary metal oxide semiconductor (CMOS) processing infrastructure and the ability to fabricate complete focal plane arrays (FPAs) at the wafer scale. A similar trend is occurring at a smaller scale with thermal imaging technologies. Microbolometers that are sensitive in the LWIR spectrum are also manufactured at the wafer scale and the resulting cost reduction is enabling thermal imagers at consumer-grade price points. The WIRED program will address current capability gaps in short wave infrared (SWIR) and mid wave infrared (MWIR) imaging by developing a high-performance, low-cost detector technology using wafer-scale fabrication techniques.
Today, SWIR and MWIR focal plane arrays are manufactured using a complex process with many steps that are performed at the individual die level. A complete process flow typically takes several months and individual cameras frequently cost tens of thousands of dollars. This complex process is required because obtaining high-quality, small-bandgap semiconductors requires that they be deposited at high temperatures on a crystalline substrate. The thermal budget of CMOS wafers is too low for typical crystal growth, and while the wafers are crystalline, the surface of CMOS wafers is composed of metals and/or amorphous insulators. This thermal limit of CMOS introduces a fundamental challenge in wafer-scale processing of semiconductor detectors directly on Read-out Integrated Circuits (ROICs) in that they are likely to lack long-range order in their atomic arrangements, as is the case with polycrystalline, nanocrystalline, or amorphous materials.
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