Program Summary
Driven by the rapidly evolving national security threat landscape, future defense systems will need access to low size, weight, and power (SWaP) artificial intelligence (AI) solutions that can rapidly transition from idea to practice. In recent years, the ability to learn from large datasets has advanced significantly due to increases in hardware performance, advances in machine learning (ML) algorithms, and the availability of high quality open datasets. However, current ML systems are generally trained prior to deployment and are not capable of adapting to new datasets in the field, limiting real-time “learning.”
Critical next-generation defense systems, such as autonomous vehicles and arrays of sensors, will be deployed in distributed settings where resources for exporting newly encountered data might be scarce or unavailable. The Real Time Machine Learning (RTML) program seeks to solve this problem by creating no-human-in-the-loop hardware generators and compilers to enable the fully automated creation of ML Application-Specific Integrated Circuits (ASICs) from high-level source code. The RTML program is focused on building an end-to-end general purpose compiler that can transform a high level ML framework into Verilog. This, in turn, may allow future engineers to rapidly develop and deploy large-scale real-time machine learning systems with customized hardware that can execute intensive ML algorithmic tasks on chip, without the need for external computational resources.