Program Summary
With the expected tapering of transistor density and performance scaling, future hardware performance gains must be derived from massive distributed parallelism, function specialization, and/or extreme system heterogeneity. In order to make these performance gains accessible to the Department of Defense (DoD), new programming methods are needed that enable near peak hardware performance with minimal programming effort. Decades of research in high productivity computing has yielded methodologies and languages that offer either programmer productivity or performance scalability, but never both simultaneously. Current high productivity programming frameworks enable rapid prototyping, but they do not generate executables efficient enough for deployment. In contrast, performant programs suitable for massively parallel hardware require significant time and domain expertise to manually control and specify parallelization, interprocess communication, and synchronization.
The Performant Automation of Parallel Program Assembly (PAPPA) Microsystems Exploration (μE) topic seeks to develop novel programming approaches and compiler technology that enable scientists and application experts to efficiently compile a broad set of high-level mathematical programs to extremely parallel and heterogeneous hardware. The μE will explore tradeoffs between programming productivity, solution generality, and scalability to enable scientists and domain experts with no understanding of parallel programming and hardware architectures to create highly efficient performance portable programs.