Program Summary
Powering computer-based applications of any kind in the operational theater consistently creates demand for faster, more efficient high-performance computing in smaller form factors. The modern surge in artificial intelligence development and applications now dramatically accelerates the need for revolutionary breakthroughs in the size, weight, power, and cooling of high-speed computer processing.
OPTIMA’s goal centers on the development of fast, compact, power-efficient, and scalable compute-in-memory (CIM) accelerators based on very large-scale integration (VLSI) fabrication compatible approaches. Existing accelerators are limited in computational power efficiency and by long execution latency. While such limitations can be addressed through compute-in-memory microchip architectures, these partial solutions require memory devices that are too large in physical size and consume too much power to integrate into mobile platforms deployed in diverse environments.
Multiply Compute Elements (MCEs) can be used as memory devices that operate in concert with Multiply Accumulate Macros (MAMs) that carry out parallel calculations. CIM architectures with arrays of MAMs for highly parallel processing can greatly enhance performance for applications such as AI-based image recognition. Through OPTIMA, DARPA seeks to develop VSLI fabrication-compatible, transistor-based MCEs with the footprint of a single transistor. Moreover, OPTIMA will also explore novel MAM data processing circuit architecture to greatly enhance the processing energy and area efficiencies.
Doing so will require novel approaches to in-memory computing, including wholesale innovations in both memory and calculation devices and capacities. Examples may include transistors with built-in memory functions, 3D-integrated elements, and/or innovative signal processing.