Program Summary
High performance computing (HPC) enables critical defense applications such as complex weapons design, weather prediction, multidomain simulations, and data-processing at the tactical edge. Historically, improvements in HPC have been driven by new generations of integrated circuit (IC) technologies and continuous improvements in transistor density, performance, and energy efficiency (Moore’s Law). However, this paradigm is no longer bringing significant advances to HPC due to the difficulty in continuing conventional scaling — particularly in power reduction. The limitations of conventional computing technologies make it even more difficult to keep pace with the demands for faster and denser computational power in ways that are also energy efficient.
To overcome the barriers to transistor scaling in HPC systems, the Low Temperature Logic Technology (LTLT) program seeks to develop a semiconductor technology optimized for low temperature (77K) operation based on advanced, very large-scale integration (VLSI) manufacturing platforms. LTLT also aims to demonstrate a 25X improvement in performance/power of state-of-the-art (SOA) CPUs compared to room-temperature operation.
The LTLT program will focus on exploring a fabrication technology for highly integrated, advanced node complementary metal-oxide-semiconductor (CMOS) logic operating at 77K, with low supply voltage and high performance, and to establish scalability to future technology nodes. The program will also explore advanced research concepts focused on high-risk/high-payoff FinFET VLSI-compatible solutions at 77K, where new circuit techniques utilize novel LTLT transistors and memory cells to achieve a 45X performance/power improvement.