Summary
The Digital RF Battlespace Emulator (DRBE) program aims to create the world’s first, large-scale, virtual radio frequency (RF) environment for developing, training, and testing advanced RF systems, such as radar and electronic warfare (EW) systems. The target DRBE environment will enable numerous RF systems to interact with each other in a fully closed-loop RF arena, replicating dense, responsive, real-world RF environments.
RF systems increasingly use artificial intelligence (AI) to help automate and augment capabilities for defense use. To help address the rigorous demands of testing and training these AI-enabled systems 24/7/365, virtual simulators are needed. In other domains, such as training modern fighter aircraft pilots, simulators are already in use to augment real-world aircraft flight hours. Current simulated environments, however, rely on conventional computing that is incapable of generating the computational throughput and speed to accurately replicate real-world RF interactions, model the scale of physical test ranges, or meet the technical requirements of more complex systems.
DRBE is exploring novel computing architectures to enable the creation of a new breed of High Performance Computing (HPC) – dubbed “Real Time HPC” or RT-HPC. The goal of the RT-HPC is to generate computational performance in the double-digit petaFLOPs class while maintaining single-digit microsecond scale end-to-end latency. By balancing computational throughput with extreme low latency, DRBE should be capable of generating high-fidelity RF environments.
To support the creation of RT-HPC and the virtual RF test range, DRBE will: 1) develop novel processors and application-specific integrated circuits (ASICs) that realize the low-latency, high compute capacity vision; 2) assemble these ASICs into a multi-processor RT-HPC system; and 3) design and integrate the necessary tools to demonstrate the use of the RT-HPC as a large-scale virtual RF test range.