Defense Advanced Research Projects AgencyTagged Content List

Information Microsystems

Relating to computer and other digital electronic systems

Showing 90 results for Microsystems RSS
High performance optoelectronic systems, e.g. ultra low-noise lasers and optoelectronic signal sources, are employed in numerous applications such as fiber optic communications, high-precision timing references, LADAR, imaging arrays, etc. Current state-of-the-art ultra-low noise lasers and optoelectronic signal sources use macro-scale photonics for mechanical and thermal noise suppression, and off-chip electronics for feedback control. The benchtop or rack mount component-level assembly of these sources limits photonic coupling efficiency as well as the speed of electronic feedback, and also adds size and weight to the system. Integration of these components in a chip-scale form factor could greatly mitigate these limitations.
The DAHI Foundry Technology program thrust seeks to establish an accessible, manufacturable technology for device-level heterogeneous integration of a wide array of materials and devices (including, for example, multiple electronics and MEMS technologies) with complex silicon-enabled (e.g. CMOS) architectures on a common silicon substrate. of The DAHI Foundry Technology thrust will incorporate and build upon the heterogeneous integration technologies of the COSMOS and E-PHI program thrusts, while also developing new capabilities in heterogeneous integration processes, yield and circuit design innovation. 
The general-purpose computer has remained the dominant computing architecture for the last 50 years, driven largely by the relentless pace of Moore’s Law. As this trajectory shows signs of slowing, however, it has become increasingly more challenging to achieve performance gains from generalized hardware, setting the stage for a resurgence in specialized architectures. Today’s specialized, application-specific integrated circuits (ASICs) — hardware customized for a specific application — offer limited flexibility and are costly to design, fabricate, and program.
Program Manager
Dr. Randy Garrett joined DARPA in February 2019 as a program manager in the Strategic Technology Office. Prior to arriving at DARPA, he worked for commercial cybersecurity companies.
The Von Neumann architecture has significantly aided the rapid advancement of computing over the past seven decades. However, moving data between the processors and memory components of this architecture requires significant time and high-energy consumption, which constrains the computing performance and workload. Overcoming this bottleneck requires new computing architectures and devices that can significantly advance the computing performance beyond the traditional practice of transistor scaling (i.e., Moore’s Law).