Defense Advanced Research Projects AgencyTagged Content List

Harnessing Complexity

Systems comprising multiple and diverse interactions

Showing 26 results for Complexity + Manufacturing RSS
The capabilities and technical specifications required for Department of Defense (DoD) platforms are constantly changing due to unanticipated circumstances, needs and emerging threats. However, complex development and design cycles and the associated high costs of structural design changes for current technologies significantly limit our ability to rapidly and affordably evolve such systems.
Deployed electronic systems increasingly require advanced processing capabilities, however the time and power required to access system memory – commonly referred to as the “memory bottleneck” – takes a significant toll on their performance. Any substantial improvement in electronic system performance will require a radical reduction in memory access time and overall dynamic power of the system. The use of a monolithic three-dimensional system-on-chip (SoC) stack to integrate memory and logic is one approach that could dramatically alter the memory bottleneck challenge.
Program Manager
Dr. William Carter is a program manager in the Defense Sciences Office. He was formerly the director of the Materials and Microsystems Laboratory at HRL Laboratories. He received his doctorate in applied physics from Harvard University in 1997 and has more than 15 years of experience managing government and industrial materials research programs. His background spans applied physics, materials science, and mechanics.
08/30/2017
In June 2017, DARPA announced the Electronics Resurgence Initiative (ERI) as a bold response to several technical and economic trends in the microelectronics sector. Among these trends, the rapid increase in the cost and complexity of advanced microelectronics design and manufacture is challenging a half-century of progress under Moore’s Law, prompting a need for alternative approaches to traditional transistor scaling.
09/11/2017
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