Unconventional Processing of Signals for Intelligent Data Exploitation (UPSIDE)

The DoD has become increasingly reliant on intelligence, surveillance and reconnaissance (ISR) applications. With the advent of expanded ISR capabilities, there is a pressing need to dramatically expand the real-time processing of wide-area, high-resolution video imagery, especially for target recognition and tracking a large number of objects. Not only is the volume of sensor data increasing exponentially, there is also a dramatic increase in the complexity of analysis, reflected in the number of operations per pixel per second. These expanding processing requirements for ISR missions, as well as other DoD sensor applications, are quickly outpacing the capabilities of existing and projected computing platforms.

The Unconventional Processing of Signals for Intelligent Data Exploitation (UPSIDE) program seeks to break the status quo of digital processing with methods of video and imagery analysis based on the physics of nanoscale devices. UPSIDE processing will be non-digital and fundamentally different from current digital processors and the power and speed limitations associated with them.

Instead of traditional complementary metal–oxide–semiconductor (CMOS)-based electronics, UPSIDE envisions arrays of physics-based devices (nanoscale oscillators are one example) performing the processing. These arrays self-organize and adapt to inputs, meaning that they do not need to be programmed in the same way digital processors are. Unlike traditional digital processors that operate by executing specific instructions to compute, UPSIDE arrays will rely on a higher-level computational element based on probabilistic inference embedded within a digital system.

The UPSIDE program consists of an interdisciplinary approach which has three mandatory tasks performed over two phases. Task 1 forms the foundation for the program and involves the development of the computational model and the image processing application that will be used for demonstration and benchmarking. Tasks 2 and 3 will build on the results of Task 1 to demonstrate the inference module implemented in mixed signal CMOS in Task 2 and with non-CMOS emerging nanoscale devices in Task 3.

The UPSIDE program launched in June 2013 when participants from five corporate labs, thirteen universities and three government labs met to share their approaches and exchange ideas for this highly collaborative effort. UPSIDE image processing applications include object detection and tracking for video, wide area imagery (WAMI) and robotics. Emerging devices such as memristors and spin torque oscillators will be integrated into the processing chain of these systems to perform a variety of functions, including feature extraction.