Semiconductor Technology Advanced Research Network (STARnet)

For decades, miniaturizing electronics has been key to a wide array of technology innovations and an important economic driver. As an example, the seemingly endless shrinking of the transistor has allowed the semiconductor industry to place ever more devices on the same amount of silicon. Each time the size decreased, transistors became faster and used less power, allowing increasingly capable electronics in smaller packages at reduced cost. In recent years, power requirements, excessive heat and other problems associated with physical limitations have reduced the advantages of continuing to shrink size. In spite of these developments industry will continue along this path of decreasing transistor scale, increasing the number of integrated cores and working to improve all aspects of the existing architectures. While challenging problems must be met and the ability to achieve the potential improvements is far from assured, these changes are likely to produce more evolutionary improvements.

Working together, DARPA, along with companies from the semiconductor and defense industries—Applied Materials, Global Foundries, IBM, Intel, Micron, Raytheon, Texas Instruments and United Technologies—have established the Semiconductor Technology Advanced Research Network (STARnet). This effort builds a large multi-university research community to look beyond current evolutionary directions to make discoveries that drive technology innovation beyond what can be imagined for electronics today. The universities are organized into six centers, each focused on a specific challenge.

• Function Accelerated nanomaterial Engineering (FAME) focuses on nonconventional materials and devices incorporating nanostructures with quantum-level properties to enable analog, logic and memory devices for beyond-binary computation.
• Center for Spintronic Materials, Interfaces and Novel Architectures (C-SPIN) focuses onelectron spin-based memory and computation to overcome the power, performance and architectural constraints of conventional CMOS-based devices.
• Systems on Nanoscale Information fabriCs (SONIC) explores a drastic shift in the model of computation and communication from a deterministic digital foundation to a statistical one.
• Center for Low Energy Systems Technology (LEAST) pursues low power electronics. For this purpose it addresses nonconventional materials and quantum-engineered devices, and projects implementation in novel integrated circuits and computing architectures.
• The Center for Future Architectures Research (C-FAR) investigates highly parallel computing implemented in nonconventional computing systems, but based on current CMOS integrated circuit technology.
• The TerraSwarm Research Center (TerraSwarm) focuses on the challenge of developing technologies that provide innovative, city-scale capabilities via the deployment of distributed applications on shared swarm platforms.

STARnet launched in early 2013.