Most deployed military information systems have constrained computational capability due to limited electrical power available on platforms, heat dissipation challenges, and limitations in size and weight. The impact on the military is that many of the current intelligence, surveillance and reconnaissance systems have sensors that collect for more information than can be processed in real time. The result is that potentially valuable real-time intelligence data is not provided in a timely manner.
Current embedded processing systems have power efficiencies of around 1 giga floating point operation per second per watt (GFLOPS/w). Warfighters anticipate requirements of at least 75 GFLOPS/w. The goal of the Power Efficiency Revolution For Embedded Computing Technologies (PERFECT) program is to provide warfighter-required power efficiency.
In the past, computing systems could rely on increasing computing performance with each processor generation. Per Moore’s Law, the number of transistors available double with each processor generation. And according to Dennard’s Scaling, clock speed could increase 40 percent each generation. This allowed increased performance without the penalty of increased power. Processors now, however, have reached the limit for increasing processing capacity without an increase power. Increasing clock speeds would now result in unacceptably large power increases.
PERFECT aims to achieve the 75 GFLOPS/w goal by taking novel approaches to processing power efficiency. These approaches include near threshold voltage operation and massive heterogeneous processing concurrency, combined with techniques to effectively use the resulting concurrency and tolerate the resulting increased rate of soft errors. The program seeks to leverage and incorporate anticipated industry fabrication geometry advances to 7 nanometers. PERFECT does not plan to build hardware, rather it seeks to develop a simulation capability to measure and demonstrate progress. It plans to specifically address embedded systems processing power efficiencies and performance, and is not concerned with developments that focus on exascale processing issues.
PERFECT program envisions three phases. The first phase initiates concept development and looks to provide sufficient proof of impact on processing power efficiency to justify continuing development. The second phase will work to develop technology and techniques to obtain processing system improvement of 75-times greater processing power efficiency. In this phase the performance impact of each development expects to be validated by simulation or equivalent demonstration. The goal of the third phase is to develop each technology or technique and provide a path to implementation.
Dr. Joseph Crossjoseph.email@example.com